Electroluminescent panel driver circuits



sept. 19, 1967 R. J. ROGERS r3,343,128

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ELECTROIIUMINESCENT PANEL DRIVER CIRCUITS Filed June 27, `1963 5 Sheets-Sheet 5 TIME SLOT 1 EXCITATION O PULSES 4 2V.

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TIME S OT 2 Y LINE I I +60 VOLTAGE o LN# UNsi-:LECTEDI SELECTED I X UNE UNSELECTED VOI-TAGE SELECTED EXCITATION- SUPPRESSION PULSE GENERATOR IIIa H80 ll4o United States Patent O 3,343,128 ELECTRQLUMINESCENT PANEL DRIVER CIRCUITS Raymond J. Rogers, Rochester, N.Y., assgnor to General Dynamics Corporation, Rochester, N.Y., a corporation of Delaware Filed June 27, 1963, Ser. No. 291,109 7 Claims. (Cl. 340-166) This invention relates to circuitry for selectively exciting a crossed-grid electroluminescent display panel and, more particularly, to means for eliminating light emission along the selected lines of an electroluminescent panel at points other than the crossover point of selected lines.

Electroluminescent display panels of the X-Y coordinate type are known which include a plurality of horizontal and vertical lines which form a crossed-grid of two sets of conductors electrically insulated from each other and positioned on opposite sides of a layer of electroluminescent material. Such panels operate to produce a visible glow in the region of crossover of a pair of se lected X and Y lines when said selected lines are subjected to a suitable time varying potential difference.

In prior devices, the row and column selected will glow along the entire length unless means are provided to suppress luminescence in the region along the selected X and Y lines other than the crossover region itself. For example, when the voltages on the X and Y lines are equal in magnitude, but of inverse polarity, one-half of the voltage will also be applied to the entire row and column selected and each selected X and Y line emits some light along its entire length with the intersection of the two lines being somewhat brighter. This half-voltage visible emission along the selected lines is undesirable in most applications and results in a poor discrimination ratio for the visual display. This invention is directed to an effective technique for suppressing the visible glow along the selected X and Y lines at points other than the desired crossover point.

In the subject invention, means are provided for applying suppression pulses to all drivers used to excite unselected Y lines, thereby altering the output at the unselected Y likes in such a manner than the potential difference existing at the crossovers of unselected Y lines and a selected X line is one-third of the potential difference occurring at the crossover of the selected X and Y lines. Purthermore, there is no output voltage on the unselected X line drivers; consequently, the potential difference at the crossovers of the unselected X lines and the selected Y line is one-third that existing at the crossover of selected X and Y lines.

Each of the X and Y lines is coupled to a corresponding X and Y line driver. The Y line driver corresponding to the Y line to be selected at any given instant is supplied with a Y selection gating pulse; likewise, the X line driver corresponding to the X line to be selected is supplied with an X selection gate. The remaining Y drivers, which are not receptive of a gating pulse, provide output voltages to the Y lines which differ from ythose supplied to the selected Y lines by their associated drivers. The X line drivers, which do not receive a ga-ting pulse, do not provide an output.

In a rst embodiment of the invention, each Y line driver includes a single grounded emitter-transistor which normally, in the absence of a Y selection gate, is prevented from receiving excitation pulses. In the absence of such excitation pulses, these transistors are cut off and represent a high output impedance in series with a suppression pulsating voltage referenced at the collector supply voltage. This supply voltage may be either positive or negative relative to the grounded emitter, depending upon whether lCC N-P-N or P-N-P transistors, respectively, are used. If it -be assumed that the supply voltage is positive relative to ground and that an N-P-N transistor is used, a suppression voltage thus appears at the collector (output) of these transistors which is a positive pulse. Each X line driver includes a grounded emitter-transistor which, in the absence lof an X selection gate, isl prevent-ed from receiving excitation pulses. Consequently, these transistors are cut oi and only the collector supply voltage appears at the output of these transistors. In other words, there is no pulse at the output of these transistors. During the period of a Y selection gate, excitation pulses are supplied to the corresponding Y line driver and the transistor associated therewith is driven into and out of conduction thereby. During conduction, the impedance of this transistor is so low that substantially none of the suppression voltage appears at its collector. The output of the selected Y transistor during conduction thus is a pulse fluctuating between the collector supply potential and zero and is, therefore, a negative pulse. During arrival of an X selection gate, the selected `transistor is receptive of excitation pulses and is switched thereby into and out of conduction. The collector voltage than iluctuates between the collector supply potential and zero volts. This output voltage then is a positive pulse. If the collector potential of the X transistor is made twice that of the Y transistors, the net voltage at the crossover of the selected X and Y lines is three times the net voltage at all other crossover points. Thus, electroluminescene at other than the selected crossover point is prevented.

The collector supply voltage may be made negative relative to ground and the Y transistors of the P-N-P type, in which case, the suppression voltage appearing at the output of the Y transistors for the unselected Y line drivers would be a negative pulse. Likewise, the output of the selected Y transistor would fluctuate between the negative direct current electric potential and zero and would be a positive pulse. The 3:1 relationship in voltages, previous ly mentioned, still applies, however.

In another embodiment of the invention, each Y line driver includes an excitation transformer in the collector circuit; the primary winding of this transformer is supplied with positive excitation pulses. The secondary winding of this excitation transformer is connected in series with the secondary winding of a suppression transformer common to all Y line drivers. The net voltage in the two seriallyconnected transformer secondaries is supplied to the associated Y line of an eletcroluminescent panel. Normally, the transistors of the unselected Y line drivers are biased off, thereby presenting a high impedance in circuit with the primary winding of the associated excitation transformer. Consequently, substantially none of the excitation voltage appears across the excitation transformer primary and no voltage is induced in the secondary thereof. Since the secondary of the excitation transformer is relatively a low impedance, practically all the suppression Voltage `appears at the unselected Y lines.

In the vabsence of `a gating pulse, the net voltage is a positive suppression pulsating voltage of n volts induced in the secondary of the suppression transformer by incoming suppression pulses. When a Y gate pulse arrives, it causes the transistor of the selected Y line driver to conduct and the transistor now represents a low impedance in circuit with the primary of its associated excitation transformer. Hence, substantially the entire excitation voltage appears across the primary winding of the excitation transformer and a negative pulse of 2n volts is induced in the secondary winding. This negative pulse is in series with the positive pulse of n volts in the secondary of the suppression transformer and provides a net output pulse of -n volts to the selected Y line of the electroluminescen-t panel. The X line drivers may be identical to those of the first embodiment, wherein a positive voltage of 211 volts is derived at the output of the selected X line driver during the presence of an X selection gate. The net voltage at the crossover of the selected X and Y lines is then the difference between +211 volts and -11 volts or 311 volts. The net voltage at the crossover of a selected line and the unselected lines for the other axis of the panel is only +11 or -11 volts.

In still another embodiment of the invention, the Y excitation and X excitation pulses are no longer in coincidence, but are timed so that the leading edge of the excitation pulse on the X line begins to rise as the trailing edge of the excitation pulse on the Y line begins to fall, or vice versa. In this embodiment, each Y line driver includes a pair of transistors, one Iof which is rendered conducting during the presence of a Y gating pulse, whereupon the voltage drop in the collector circuit acts to block suppression pulses from the base -of the other (or output) transistor. The Y gating pulse further allows excitation pulses occurring during the gate period in time slot No. 1 to switch the output transistor of the selected Y driver into and out of conduction. The collector or output circuit of the output transistor is referenced at+11 volts. During conduction of the output transistor, pulses fluctuating from +11 volts to zer-o are derived, that is, negative pulses of 11 volts amplitude occurring during time slot No. 1 are derived from the selected Y output transistor. In the absence of a Y gating pulse, the first transistors of the unselected Y line drivers are biased oif, permitting suppression pulses to be applied to the base of the corresponding output transistors. Furthermore, the excitation kpulses are prevented from reaching the output transistors of the unselected Y drivers by means of diode switching. The application of the suppression pulses, which occur in time slot No. 2, switches the output transistors of the unselected Y drivers into and out of conduction, thereby producing negative pulses of n volts which occur during time slot No. 2.

The X line drivers may be identical to those of the second embodiment mentioned above; that is, excitation pulses occurring during time slot No. 2 are supplied to the transistor of a selected X line driver during the X gating period to render the selected transistors conducting. During conduction, the voltage at the collector or output circuit of the selected X transistor liuctuates between zero and 211 volts, or, consists of negative pulses referenced at +211 volts, In the absence of an X gating pulse, the unselected X transistors are biased off and no pulses derive at the output thereof. In the case of a selected X line and a selected Y line, there exists a negative pulse of 211 volts during time slot No. 2 and a negative pulse of 11 volts in time slot No. 1. This means that the negative-going edge of the -211 volt pulse substantially coincides with the positive edge of the negative 11 volt pulse, or vice versa. The difference in voltage at the crossover of the` selected X and Y lines, consequently, is 3n volts. In lthe case of a selected X line and unselected Y lines, there exists a negative voltage of 2n volts in time slot No. 2 and a negative 11 volt pulse in time slot No. 2. The difference in voltage at the crossovers of a selected X line and unselected Y lines then is only 11 volts and no luminescence can occur. In the case ,of a selected Y line and unselected X line, there exists a negative 11 volt pulse and no pulse, respectively. Consequently, the voltage at the crossovers of a selected Y line and unselected X lines is only n volts and, again, no luminescence can occur.

Other objects, featuresand advantages of this invention will become apparent as the following description proceeds and the features of novelty which characterize the invention will be pointed out with particularity in the claims annexed to and forming a part of this specification and drawings, in which:

FIG. 1 is a block diagram showing the general details of a device in accordance with the invention;

FIG. 2 is a schematic diagram of the rlirst embodiment of the invention;

FIG. 3 are waveforms illustrating the operation of the circuit shown in FIG. 2;

FIG. 4 is a schematic diagram showing a modification of the embodiment shown in FIG. 2;

FIG. 5 are waveforms showing the` operation of the circuit of FIG. 4;

FIG. 6 is a schematic diagram of a further embodiment of the invention;

FIG. 7 are waveforms illustrating the operation of the circuit shown in FIG. 6;

FIG. 8 is a schematic diagram of still another embodiment of the invention; and

FIG. 9 are waveforms explaining the operation of the circuit shown in FIG. 8.

Referring to FIG. 2 of the drawings, a first embodiment of the invention is shown. The base of each of the N-P-N transistors 25a to 2511 of respective Y line drivers 15a to 1511 is connected by Way of a corresponding one of resistors 27a to 2711 to a potential of 6 volts positive with respect to a reference such as ground. In the absence of a Y selection gating pulse, the cathode of diodes 2811, 28e` and 2811 is at approximately -6 volts and is forward biased. The potential at the base of transistors 25a, 25e and 2511 then assumes a potential of about -5.5 volts,

taking into account the voltage drop across the associated diodes, so that transistors 25a, 25e and 2511 are biased off; these transistors, consequently, represent a high impedance. Diodes 29a, 29e and 2911 are back biased owing to the 5.5 volts on their anodes; consequently, excitation pulses, which fluctuate between -3 volts and +3 volts relative to ground, are unable to pass respective diodes 2911, 29C and 2911 and are prevented from reaching the base of transistors 2511, 25cand 2511. The collector load resistors 26a, 26b 2611 of transistors 25a to 2511 are each connected in circuit with the secondary winding 32 of transformer 30. Suppression pulses, which iiuctuate between O-volts and +10 volts are supplied to the primary ywinding 31 of the suppression pulse transformer, thereby inducing a pulse of 60 volts in the secondary winding 32 thereof. Since the secondary winding is referenced to +60 volts and since the two windings 31 and 32 of the transformer 30 are wound in the same direction, the amplified suppression pulses appearing across winding 32 tiuctuate between +60 volts and +120 volts. This pulsating voltage is available at points 26a, 26C and 2611 of the collective circuits of respective transistors 25a, 25C and 2511 when the transistors are cut off and is supplied to the corresponding horizontal `lines Y1, Y3 and Yn. All unselected Y lines, therefore, carry a positive-going pulse of 60 volts.

When a Y selection gating pulse arrives at one of the Y line drivers, for example, driver 15b, the voltage at the cathode of diode 28h rises to +6 volts, thus back biasing diode 28h. Diode 29b is forward biased by the +6 volts on its anode and excitation pulses, fluctuating .in level between -3 volts and +3 bolts, are supplied to the base of transistor 25b. As the amplitude of the excitation pulses rise from -3 volts to approximately +03 volt, transistor 25b is rendered conductive. As the level of the excitation pulses falls toward -3 volts, the transistor is switched off until the next pulse reaches a level of about 0.3 volt. Since the impedance krepresented by the transistor 25b becomes very small during conduction, its collector goes to substantially O-volts or ground during conduction. As the excitation pulse swings negatively, the collector voltage approaches the direct current level of +60 volts at which one end -of transformer winding 32 is maintained.` The switching action of transistor 2512 is also a negative-going pulse, which uctuates between +60 volts and O-volts, appearing at the corresponding vertical line Y2 of the electroluminescent panel 10. In other words, the selected Y line of the electroluminescent panel carries a negativegoing pulse of 60 volts.

The 'bases of transistors 35a to 3511 of the respective X I line drivers 20a to 2011 are connected Iby way of corresponding resist-ors 37a to 3711 to a source of 6 volts, while the collector load resistors 34a to 3411 are referenced to -120 volts. In the absence of an X selection gating pulse, the anode of diodes 38a, 38C and 3811 are forward biased by the +6 volts supplied from the X line selection circuitry and the bases of respective P-N-P transistors 35a, 35C and 35u are at about +6 volts and transistors 35a 35C and 3511 are biased off. The excitation pulses from the excitation pulse source, which are inverted by inverter 100, cannot reach the bases of these transistors since corresponding diodes 39a, 39e and 3911 are back biased by the approximately +6 volts on their cathodes. With transistors 35a, 35e and 3511 nonconductive and with their collector load resistors 34a, 34C and 3411 returned to a source of -120 volts, the output from points 36a, 36e and 3611 in the collector circuits of respective transistors 35a, 35C and 35n remains at -120 volts. This steady voltage applied to X lines X1, X3 and X11 has no visible effect upon the materials of the electroluminescent panel 10.

When an X selection gating pulse is supplied, say, at the input to X line driver 20h, diode 38h is back biased by this -6 volt input. Consequently, diode 39b is forward biased and excitation pulses are permitted to pass diode 39h to the base of transistor 35h, thereby intermittently biasing transistor 35b in and out of conduction. During the conduction period, a positive-going pulsating voltage is derived at point 36b which rises from a level of +12() volts to 0 volts. This positive-going pulse of 120 volts is supplied to corresponding h-orizontal line X2 which, in the example given here, is the selected horziontal line.

As shown clearly in FIG. 3, the unselected Y line driver, that is the Y line driver is not receptive of a Y gating pulse, supplies a positive-going 60-volt pulse to the associated unselected Y lines, while the unselected X line drivers, that is the line drivers are not receptive of an X gating pulse, supply no pulses to their associate X lines. Consequently, the Crossovers of the unselected X and Y lines have a peak potential difference of 60 volts; this potential is insufficient to cause luminescence at such crossover points. The selected Y line driver supplies a negative-going 60-volt pulse to the selected Y line Y2, while the selected X line driver supplies a positive-going 120-volt pulse to the selected line. Consequently, the crossover of the selected X and Y lines is subjected to a peak potential difference of 18() volts. This voltage is suicient to illuminate the selected crossover point.

It should be noted that the crossover points of the selected X line and the unselected Y lines are not illuminated, since the unselected Y lines receive a positivegoing potential of 60 volts; whereas, the selected X line reecives a positive-going potential of 120 volts. The net voltage, therefore, is only 60 volts. Similarly, the crossovers of the selected Y line and unselected X lines will be at a potential equal to the difference between a negative 60-volt -pulse and no pulse, or 60 volts. Again, the voltage is insufficient to produce luminescence. By means of applicants invention, therefore, illumination of a bright spot at the intersection of two selected lines of the panel 10 is possible, while at the same time illumination is suppressed from occurring along the entire length of the selected X and Y lines.

FIG. 4 discloses a modified version of the X and Y line driver circuitry of FIG. 2 which uses transistors of the P-N-P type for the Y line driver circuits a to 1511. In FIG. 4, the bases of the transistors 45a to 4511 of the Y line drivers 15a to 1511 are connected through base resistors 47a to 4711 to a source of -6 volts. The collector load resistors 44a t-o 4411 are connected to one end of the secondary winding 32 of transformer 30, while the other end of this secondary winding is connected to -60 volts. The primary and secondary windings of transformer 30 are wound in opposite directions, unlike the transformer of FIG. 2, so that the positive-going 10 volt suppression pulses supplied to the transformer induce in the secondary winding negative pulses fluctuating from -60 volts to volts. The Y selection circuitry is reversed so as to supply normally +6 volts over lines 13a, 13C and 1311 to the diodes 48a, 48C and 48n of the respective Y line drivers, 15a, 15c and 1511. The Y selection gate in the modification of FIG. 4 is a negative-going 6volt pulse, as shown in FIG. 5, in contrast with the positivegoing 6-volt gating pulse used in the device of FIG. 2. The diodes 48a, 48C and 4811, during the absence of a Y gating pulse, are forward biased, whereupon the bases of respective transistors 45a, 45C and 45n are brought to a potential of approximately +6 volts. In addition to cutting off these transistors, the +6 volts at the bases of these transistors reverse biases diodes 49a, 49C and 4911 and prevents application of excitation pulses to the bases of corresponding transistors 45a, 45C and 4511. The suppression pulses thus appear at points 46a, 46c and 4611 and the vertical lines Y1, Y3 and Yn receive a negativegoing pulse fluctuating between -60 volts and 120 volts, as indicated in FIG. 5.

If line Y2 is to be selected, a Y selection gate is applied over line 13b to Y line driver 15b, thus back biasing diode 48h. The -.3 volt at the base of transistor 45b now forward biases diode 49b to allow excitation pulses to reach the base of transistor 45b and alternately switch on and yoff this transistor, in a manner already described in connection with the circuit of FIG. 2. The output voltage at point 46h in the collector circuit of transistor 15b iluctuates from -60 volts to 0 volt.

The X drive circuitry of FIG. 4, unlike that of FIG. 2, utilizes N-P-N transistors 55a to 55n in the X line drivers 20a to 2011. The bases of transistors 55a to 5511 are connected by way of resistors 57a to 5711 to a source +6 volts, while the collector load resistors 54a to 5411 are connected t-o a source of +120 Volts. In the example shown in FIG. 4, diodes 58a, 5581` and 5811 are forward biased by the `-61 volts supplied thereto over lines 14a, 14C and 1411, respectively. This places a negative Voltage on the anode of diodes 59a, 59e and 5911, thereby isolating the excitation pulses from the corresponding transistors 55a, 55C and 5511. Since these transistors are cut off, the outputs from points 56a, 56C and 56n of the collector circuits consist only of a steady voltage of +120 volts. The positive gate applied to X line driver 2011 precludes the back biasing of diode 59b and permits excitation pulses to switch transistor 55b on and off. The output from point 56h -then in a negative-going pulse uctuating between'120 volts and 0 volts.

As shown in FIG. 5, during the absence of an X or Y selection gate, the unselected Y lines Will carry a negative pulse of 60 volts and the unselected X lines will carry no pulse. The voltage differential at the yCrossovers of the unselected X and Y lines, therefore, will be 60 volts and will be insufficient to produce illuminescence. The crossover of a selected Y line and a selected X line will be maintained at the voltage differential between a positive 60 volt pulse and a negative 120 Volt pulse, or at 180 volts. This potential is suiicient to cause luminescence. At the crossover of an X selected line and an unselected Y line, the voltage at these X and Y lines will be a negative 120 volt pulse and a negative 60 volt pulse, respectively. The voltage differential is 60 volts and is insuficient for luminescence. Similarly, there will be no luminescence at the crossovers of a selected Y line and unselected X lines since the voltages at these X and Y lines will be a positive 60 volt pulse and no volt pulse, respectively. The same effect is obtained at the Crossovers of a selected X line and unselected Y lines since the voltages at the X lines will be a negative 120 volt pulse and the voltage at the unselected Y lines will carry a negative 60 volt pulse.

A further embodiment of the invention is shown in FIG. 6 which has the advantage over the cir-cuits of FIGS. 2 and 4 in avoiding the use of a 120 volttransistor. This circuit of FIG. 6, however, requires the use of transformers for each transistor in addition to the suppression transformer common to all Y line drivers. Although the excitationpulses applied to the various transistors of the Y line drivers a to 1511 `are applied also to the primary of the suppression transformer 30, it is evident that transformer 30 effectively serves as a suppression transformer for supplying suppression pulses similar to those used in transformer 30 of FIG. 2. The transformers 61a to 6111 will be referred to as excitation transformers and the transformer 30 as a suppression transformer. Excitation pulses shown, by way of example, have positive-going pulses of -30 volts peak level, are supplied to the P-N-P transistors 65a to 6511 of respective Y line drivers 15a to 1511 by way of collector load resistors 64a to 6411 and the respective primary winding 68a to 6811 of excitation transformers 61a to 6111.1The excitation pulses, as previously mentioned, further may be applied to the primary winding 31 of suppression transformer 30. It is possible, of course, to use a separate suppression pulse source; however, the excitation pulses serve adequately provided the voltage obtained at the step-up transformer `30 is a positive-going 60 volt pulse. Since the excitation pulses are 30-volt positive pulses, a step-up transformer() with a l to 2 turns ratio and identical winding direction in primary and secondary will supply the desired positive-going 60 volt suppression pulses. The secondary winding 32 of suppression transformer 30 is in series with each of the secondary or output windings 69a to 6911 of the respective transformers 61a to 6111.

With no Y selection gate at the input to Y line drivers 15a, 15e and 15n, +6 volts is supplied to the anode of diodes 81a, 81C and 8111 so that these diodes are conductingrThe P-N-P transistors 65a, 65cand 6511, therefore, are normally biased olf by this +6 volt input to the bases of these transistors. These transistors thus represent a high impedance, particularly as compared with `the `impedance of the primary transformer windings 68a, 68C and 6811. Consequently, most of the excitation voltage applied to transformers 61a, 611' and 6111 appears across the respective transistors 65a, 65e and 6511 and substantially no excitation voltage exists across the primary windings 68a, 68C and 6811. The voltage induced in secondary windings 69a, 69C and 6911 of these transformers is substantially negligible. The net voltage available at the output lines 15011, 150C and 15011 of the Y line drivers-15a, 15e and 1511 is the algebraic sum of the zero volts induced in the secondary windings 69a, 69C and 6911 and the +60 volt pulsesr induced in the common secondary winding 32 in series therewith. This net voltage, therefore, is a positive-going 60 volt pulse which is supplied to the respective vertical lines Y1, Y3 and Yn.

Upon arrival of a Y selection gate, the anode ofdiode 81h in Y driver circuit 15b is placed at -6` volts and is reversed biased. The transistor 15b is driven to satura-` (30 volts) appears across the primary winding 68b of the` excita-tion transformerlb. Transformer 6111 has a stepup ratio of 1:4 and, inasmuch as the primary and second-` ary windings are wound oppositely, a negative-going 120 volt pulse is induced in the secondary winding 6911 of excitation transformer 61b owing to the negative-going 30-volt pulse supplied to the primary winding 68b thereof. In addition, secondary winding 32 of suppression transformer 30 has induced therein a 60-volt positive pulse. The negative 120-volt pulse in winding 69h in series with the 60-volt pulse in winding 32 provides a net output pulse of -60 volts on line 150bof Y line drive 15b. This negative 60-volt pulse is applied to the corresponding selected vertical line Y2 of electroluminescent panel 10.

The X line drivers 28a to 2811 in the device of FIG. 6 also have transformers 71a to 7111, respectively, associated therewith. The transformers 71a to 7111 receive excitation pulses which may be identical to those supplied to the Y line drivers 15a to 1511. The X liney drivers 2011 to 2011 include respective P-N-P transistors 71a to 7111, the bases of which are biased to -6 volts through respective base resistors 77a to 7711. The collector circuit for each of the transistors 75a to 7511 includes the primary windings 78a to 7811 of 124 step-up transformers 71a to 7111 and load resistors 74a to 7411, all respectively. The excitation pulses i are supplied to the collector of transistors 75a to 7511 through collector load resistors 74a to 7411 and the primary windings 78a to 7811, all respectively. The `secondary windings 79a to 7911 provide the respective output voltages to the various X lines of the electro-luminescent panel 10. The primary and secondary windings of transformers 71a to 7111 are wound to obtainthe same polarity of both primary and secondary. Consequently, if positive excitation pulses of 30 volts are supplied to the primary windings of transformers 71a to 7111, positive pulses of 12() volts are induced in the secondary windings 79a to 7911 of the transformers, when a particular X transistor is selected by the gate.

With no X selection gate, 6 volts are supplied to diodes 84a, 84e` and 8411; these diodes are forward biased and the P-N-P transistors 75a, 75e and 7511 are biased off by the +6 volts supplied by way of the diodes 84a to the transistor base. Consequently, the impedance of each of transistors 75a, 75e and 7511 is quite high and substantially all of the 30 volt excitation voltage appears across the respective transistors, with very little of this voltage appearing across the ,corresponding primary windings 78a, 78e and 7811. There is, therefore, substantially zero voltage induced in the secondary windings 79a, 79c'and 7911 of transformers 71a, 71c and 7111 and the X output voltage is zero.

Upon arrival of an X selection gate, the anode of diode 84b is supplied with -6 volts. This gate back biases diode 8411 and removes the positive voltage at the base of transistor 7511. The transistor 75b thereby `is biased to saturation and represents a very low impedance in series with the primary winding 78b of transformer 71b. Substantially all of the excitation voltage +30 volts) thus appears across the primary winding 78b of transformer 7111. Since the step-up voltage ratio of transformer 71h is 1:4, positive pulses of 120 volts are induced in` the secondary 79b. These positive pulses are supplied to the corresponding vertical line X2 of the electro-luminescent panel 10.

As shown clearly in FIG. 7, the +60 volt pulses applied to the unselected Y lines of the electroluminescent panel and zero voltage at the unselected X lines produce a resultant voltage at the crossover of the unselected X and Y lines of 60 volts-a voltage insuicient to establish a visible glow. Similarly, at the crossover of a selected X line and an unselected Y line, positive-going pulses `of volts and 6() volts, respectively, occur. Moreover, at the crossover of an unselected X line and a selected Y line, voltages of zero volts and negative 6() volts, respectively, occur. The resultant voltage in each of these two cases is only 60 volts and `no visible glow can be established. It is evident, therefore, that the voltage differential is suicient to cause the visible glow only at the crossover of the selected X and Y lines. At this crossover point, the voltage differential between the respective positive 120 volt and negative 60 volt pulses is 180 volts.

A :further modification of the invention is shown in FIG. 8 which differs from those previously described principally in that pulses of like polarity, but not in time coincidence, are supplied to the selected X and Y line drivers during the selection gating period, whereas the remaining or unselected Y line driver and the selected X line driver produce pulses of like polarity which are in coincidence. The Y line drivers 15a to 1511 are supplied with non-coincidence suppression pulses and excitation pulses which, for example, may be produced at opposite terminals of a conventional multivibrator 90 and thus occur in alternate time slots. The resultant Y suppression and excitation waveforms then are as indicated in FIG. 9. The Y suppression pulses also may be used as X excitation pulses for the X line drivers 20a to 2011, so that the X and Y excitation pulses occupy alternate time slots, also as shown in FIG. 9. For the sake of illustration, X and Y line drivers 20b and 15b are illustrated as being receptive of selection gating pulses in order to select lines X2 and Y2, respectively.

The Y line drivers 1511 to 1511 include a pair of N-P-N transistors 9111 to `9111 and 10-111 to 10111. The Y excitation pulses are supplied to diodes 9211 to 9211 of respective Y line drivers 1511 to 1511. The output of the Y selection circuitry for each of the Y line drivers 1511 to 1511 is supplied to diodes 9311 to 9311, respectively. The anodes of diodes 92 and 93 are connected through corresponding resistors 9411 to 9411 to a source of +6 volts. Normally, that is, during the absence of a Y gate pulse, the -6 volts at the cathode of diodes 9311 and 93n renders these diodes conductive, thereby overcoming the positive voltage at the anode of diodes 9211 and 9211. The cathode of diodes 9511 and 9511 in the base circuit of transistors 91a and 9111 also attains a potential of about -6 volts. Since diodes 9211 and 9211 are back biased, the Y excitation pulses cannot pass therethrough. Moreover, since diodes 9511 and 9511 are forward biased by the negative volts at the cathode, the bases of transistors 91a and 9111 assume a negative potential of the order of 6 volts. Transistors 9111 and 9111, consequently, are cut olf; this means that there is no voltage drop owing to current flow in the collector resistors 96a and 9611 due to conduction in the transistors. The potential at junction points `9711 and 97n is at +6 volts. The suppression pulses are applied to diodes 9811 to 9811. Since diodes 9811 and 9811, as well as 10211 and 10211, are forward biased by the positive voltage at points 9711 and 9711, a suppression pulse is passed therethrough and reaches the bases of grounded emitter transistors 101a and 10111. The bases of these transistors are connected to a source of -6 volts by way of resistors 10311 to 10311, respectively, while their collectors are connected to a source of +60 volts through collector load resistors 10411 and 10411, respectively.

The suppression pulses applied to the bases of transistors 10111 and 10111 cause these transistors to be switched alternately into and out of conduction during the time interval corresponding to that of the suppression pulses. In other words, the output at points 10511 and 10511 fluctuates between 60 volts and zero during the time slots occupied by the Y suppression pulses. This time period is indicated as 12 in FIG. 9. It should be noted that diodes 10711 and 10711 are back biased during this period 12 and thus prevent application of excitation pulses to the input circuit of respective transistors 10111 and 10111.

During the period of occurrence of a Y selection gate, +6 volts is applied to the diode 93b of Y line driver 15b. Diode 93b is back biased and no negative voltage is permitted to overcome the positive voltage at the anodes of diodes 92b and 107b and the cathode of diode 9511. Therefore, diodes 9211 and 107b are forward biased and permit excitation pulses to pass to the base of corresponding transistor 101b. Since diode 95b` is back biased, the excitation pulse and gate pulse cannot reach the base of transistor 91b. Transistor 91b is conducting and the voltage drop in collector resistor 96bcauses the voltage at 97b to drop from the level of 6 volts to a point sufficiently negative to back bias 98h and 102b. Suppression pulses, hence, are unable to reach the input circuit of transistor 101b. As previously stated, the excitation pulses reaching the base of transistor 101b by Way of diodes 92b and 107b cause transistor 101b to 4be switched linto and out of conduction to produce output pulses at point 105b which uctuate from +60 volts to zero, during the time period occupied 10 by the Y excitation pulses. This time period is indicated in FIG. 9 as t1.

The Y suppression pulses also may be used as excitation pulses for the X line drivers and are supplied to diodes 11211, 112b -and 11211 of respective X line drivers 2011, 20b and 2011. It should be understood that the Y suppression pulses are, in fact, excitation pulses, when supplied to the X line drivers. The output from the X line selection circuitry is supplied to diodes 11111, 111b` and 11111 of these drivers. The X line drivers also comprise N-P-N transis tors 11411, 114b and 11411 having respective collector resistors 11611, 116b and 11611 maintained at 120 volts positive relative to the grounded emitters. The bases of the transistors 11411, 114b and 11411 are connected through respective resistors 11711, 117b and 1111 to +6 volts. Normally, that is, in the absence of an X selection gate, the diodes 11111 :and 11111 are forward biased by the -6 volts at the cathodes. This places points 11811 and 11811 at approximately -6 volts and back biases diodes 11211 and 11211. This prevents passage of the X excitation (Y suppression) pulses to transistors 11411 and 11411. Moreover, the negative voltage iat points 11811 and 11811 biases off transistors 11-411 and 11411. The output at points 12211 and 12211 consists of a steady voltage of +120 volts.

When an X selection gate of +6 volts is applied to diode 111b of X line driver 2011, this diode is back biased and the potential at point 11811 is controlled by excitation pulses supplied lby way of diode 112b'. This potential forward biases dode 112b and permits passage of X excitation pulses during time slot 12 to reach the base of transistor 114b. These excitation pulses alternately switch transistor 114b into vand out of conduction to provide pulses at 122b fluctuating between +120 volts and zero during the time s-lot occupied by the X excitation pulses. This time slot is indicated in FIG. 9 at 12.

As indicated in FIG. 9, the voltage at unselected Y line is a negative 60 volt pulse occurring during time slot 12; at this time the unselected X lines carry no pulse. Consequently, the voltage differential at the crossover of unselected X and Y lines is 60 voltsan amount insuicient to establish the electroluminescence. The voltage at =a selected Y line is a negative 60 volt pulse occurring time slot 11; during this time, the unselected X lines carry no pulse. Hence, the voltage differential at the Crossovers of a selected Y line and unselected X lines is 60 voltsagain insu'icient for electroluminescence. The voltage at a selected X line is a negative 120 volt pulse occurring during time slot 12. Hence, the net voltage at the crossovers, of a selected X line and unselected Y lines is a 60 volt negative pulse. Only at the crossover of selected X and Y lines is the net voltage suflicient to cause electroluminescence. In this case, the selected X `line driver produces a negative 120 volt pulse at time slot 12, while the selected Y line driver produces a negative-going pulse of 60 volts at time slot 11. Since the negative-going edges of the 120 volt X line driver coincides with positive-going edges of the 60 volt Y line drive, the result is a voltage of 18()` volts.

Although the suppression and excitation pulses each have been illustrated as symmetrical waves, that is, pulses of identical alternations, it is possible to generate excitation and suppression pulses having a duty cycle greater than 0.5. In such cases, -it is essential, of course, that the leading edges of the suppression pulses coincide substantially with the trailing edges of the excitation pulses, or vice versa.

This invention is not limited to the particular details of construction, .materials and processes described, as many equivalents will `suggest themselves to those skilled in the art. It is, accordingly, desired that the appended claims be given a broad interpretation commensurate with the scope of the invention within the art.

What is claimed is:

1. A two-dimensional display system comprising an electroluminescent panel including an array of first spaced lines extending in a first direction and an array of spaced second lines extending in a second direction, each of said first lines crossing said second lines to form a plurality of crossover points, and a layer of electroluminescent material disposed between said arrays of lines, a plurality of first drivers each coupled to a corresponding one of said first lines, a plurality of second drivers each coupled to a corresponding one of said second lines, first circuit means for selectively applying a first gating pulse to a selected one of said first drivers corresponding to the first line to be selected, second circuit means for selectively applying a second gating pulse to a selected one of said second drivers corresponding to the second line to be selected, each of said first drivers being normally productive of a first voltage output on said ycorresponding one of said first lines, each of said first line drivers being responsive to said first gating pulse for producing a second voltage output on said corresponding one of said first lines, each of said second line drivers being normally productive of a third voltage output on said corresponding one of said second lines, each of said second line drivers responsive to said second gating pulse to produce a fourth voltage output on said corresponding one of said second lines, said fourth voltage output and said first voltage output at the crossovers of a selected second line and unselected first lines produce a voltage differential which is below that necessary for establishing luminescence of said electroluminescent material, said second voltage output and said third voltage output at the crossovers of a selected first line and unselected second lines produce a voltage differential which is below` that necessary for establishing luminescence ofsaid electroluminescent material while said second voltage output and said fourth voltage output at the crossover of the selected first line and the selected second line produce a voltage differential necessary for establishing luminescence of said material thereat.

2. A two-dimensional display system comprising an electroluminescent panel including an array of first spaced lines extending in a first direction and an array of spaced second lines extending in a second direction, each ot said first lines crossing said second lines to form a plurality of crossover points, and la layer of electroluminescent material disposed between said arrays of lines, a plurality of first drivers each coupled to a corresponding one of said first lines, a plurality ofy second drivers each` coupled to a corresponding one of said second lines, first circuit means for selectively applying a first gating pulse to a selected one of said first drivers corresponding to the first line to be selected, second cir cuit means for selectively applying a second gating pulse to a selected one of said second drivers corresponding to the second line to be selectedsaid first drivers being normally nonconductive, said first line drivers being rendered conductive in response to said first gating pulse for producing first output positive pulses on said first line selected, said second line drivers being normally productive of second output positive pulses synchronous with said first pulses, said second line drivers being responsive to said second gating pulse to produce third output negative pulses synchronous with said first and second pulses, only said first and third pulses on the selected one of said first lines and the selected one of said second lines providing a voltage differential necessary for establishing luminescence of lsaid material at the crossover of said first and second selected lines. Said third pulses providing a voltage differential at the crossovers lof a selected second line and unselected first lines which is below that necessary for establishing luminescence of said electroluminescent material, said second output pulses and said first output pulses providing a Voltage differential at the crossovers of a selected first line and unselected second lines which is below that necessary for establishing luminescence of said electroluminescent material.

3. A two-dimensional display system comprising an electroluminescent panel including an array of first spaced lines extending in a first direction and an array of spaced second lines extending in a second direction, each of said first lines crossing said second lines to form a plurality of crossover points, and a layer of electroluminescent material disposed between said arrays of lines, `a plurality of first drivers each coupled to a corresponding one of said first lines, a plurality of second drivers each coupled to a corresponding one of said second lines, first circuit means for selectively applying a first gating pulse to a selected one of said first drivers corresponding to the first line to be selected, second circuit means for selectively supplying a second gating pulse to a selected one of said second drivers corresponding to the second line to be selected, said first drivers being normally productive of a steady state first output, said first line drivers being responsive to said first gating pulse for producing `first output pulses of a given polarity, said second line drivers being normally productive of second output pulses of said given polarity, said second line drivers being responsive to said second gating pulse to produce third output pulses of a polarity opposite to said given polarity, said first, second and third output pulses being synchronous with each other, said third output pulses of said opposite polarity and said steady state first output providing a voltage differential at the crossovers of a selected second line and unselected second lines which is below that necessary for establishing luminescence of said electroluminescent material, said first output pulses of said given polarity and said second output pulses providing a voltage differential at the crossovers of a selected first line and unselected second lines which is below that necessary for establishing luminescence of said electroluminescent material while said second pulses and said third pulses provide `a voltage differential in the crossover of the selected first line and the selected second line necessary for establishing luminescence of said electroluminescent material.

4. A two-dimensional display system comprising an electroluminescent panel including an array of first spaced lines extending in a first direction and an array of spaced second lines extending in a second direction, each of said first lines crossing said second lines to form a plurality of crossover points, and a layer of electroluminescent material disposed between said arrays of lines, a plurality of first drivers each coupled to a corresponding one of said first lines, a plurality of second drivers each coupled to a corresponding one of said second lines, first circuit means for selectively applying a first gating pulse to a selected one of said first drivers corresponding to the first line to be selected, second circuit means for selectively supplying a second gating pulse to a selected one of said second drivers corresponding to the second line to be selected, said first drivers being normally nonconductive and productive of a steady state first output, said first line drivers being rendered conductive in response to said first gating pulse for producing first output pulses of a given polarity in a first time slot, said second line drivers being normally nonconductive for producing second output pulses of said given polarity occurring within said first time slot, said second` line drivers being rendered conductive in response to said second gating pulse yto produce third output pulses occurring within a second time slot adjacent to said first time slot, said second output pulses of said first time slot and said steady state first output providing a voltage differential at the crossovers of an unselected second line and unselected first lines which is below that necessary for establishing luminescence of said electroluminescent material, said second output pulses of said first time slot and said first output pulses producing a voltage differential at the crossovers of a selected rst line and unselected second lines which is below that necessary for establishing luminescence of said electroluminescent material said first output pulses and said third output pulses 13 occurring at said adjacent vfirst and second time slots producing a voltage differential at the crossover at a selected first line and a selected second line necessary for establishing luminescence of said material.

5. A two-dimensional display system comprising an electroluminescent panel including an array. of first spaced lines extending in a first direction and an array of second spaced lines extending in a second direction, each of said first lines crossing said second lines to form a plurality of crossover points, and a layer of electroluminescent material disposed between said arrays of lines, a source of suppression pulses, a source of excitation pulses, a suppresion pulse transformer supplied with said suppression pulses, a plurality of first drivers each coupled to a corresponding one of said first lines, a plurality of second drivers each coupled to a corresponding one of said second lines, said second drivers each including a transistor having the output winding of said suppression pulse transformer in circuit therewith, excitation pulse transformers associated with said second drivers, the output winding of said suppression pulse transformer being in circuit with a corresponding line, first circuit means for selectively applying a first 'gating pulse to a selected one of said first drivers corresponding to the first line to 'be selected, second circuit means for selectively applying a second gating pulse to a selected one of said second drivers corresponding to the second line to be selected, the transistors of said first drivers normally being isolated from said excitation pulses whereby a steady state first output is produced, said first line driver being rendered conductive by said first gating pulse for transferring said excitation pulses to the corresponding transistor to produce first output pulses, the output circuits of the transistors of said second line drivers normally being at the potential induced in the output winding of the corresponding suppression pulse transformer whereby second output pulses of a given polarity are obtained, said second line drivers being rendered conductive in response to said second gating pulse for transferring said excitation pulses to the corresponding transistor for providing a pulsating voltage at said transistor which combines with the voltage across the output winding of said suppression pulse transformer to produce second output pulses of a polarity opposite to said given polarity, said second output pulses of said given polarity and said steady state first output providing a voltage differential at the Crossovers of a selected second line and unselected first lines which is below that necessary for establishing luminescence of said electroluminescent material, said second output pulses of said given polarity and said first output pulses producing a voltage differential at the crossovers of a selected first line and unselected second lines which is below that necessary for establishing luminescence of said electroluminescent material said second output pulses of said polarity opposite to said given polarity and said first output pulses producing a voltage differential at the crossover of a selected first line and a selected second line necessary for establishing luminescence of said material.

`6. A two-dimensional display system comprising an electroluminescent panel including an array of first spaced lines extending in a first direction and an array of second spaced lines extending in a second direction, each of said first lines crossing said second lines to form a plurality of crossover points, and a layer of electroluminescent material disposed between said arrays of lines, a source of excitation pulses, a plurality of excitation pulse transformers and a suppression pulse transformer each supplied with excitation pulses, a plurality of first drivers each coupled to a corresponding one of said first lines, a plurality of second drivers each coupled to a corresponding one of said second lines, said drivers each including a transistor having the input winding of said excitation pulse transformer in circuit therewith, said suppression pulse transformer output winding being in series with the output windings of the excitation pulse transformers associated with said second drivers, the output winding of said corresponding excitation pulse transformer being in circuit with a corresponding line, first circuit means for selectively applying a first gating pulse to a selected one of said first drivers corresponding to the first line to be selected, second circuit means for selectively applying a second gating pulse to a selected one of said second drivers corresponding to the second line to be selected, the transistors of said first drivers normally representing a high impedance in series with the input winding of the corresponding excitation pulse transformer whereby substantially zero voltage is induced in the output winding of the associated excitation pulse transformer and a steady state first output is produced, said first line driver being rendered conductive by said first gating pulse for transferring said excitation pulses to said excitation pulse transformer output winding to produce first output pulses, the transistors of said second line drivers normally representing a high impedance in series with the input winding of the corresponding excitation pulse transformer whereby substantially zero voltage is induced in the output winding of the associated excitation pulse transformer which combines with the voltage at the output winding of the suppression pulse transformer to produce second output pulses of a given polarity, said second line drivers being rendered conductive in response to said second gating pulse for transferring said excitation pulses to the corresponding excitation pulse transformer output winding which combines with the voltage across the output winding of said suppression pulse transformer to produce second output pulses of a polarity opposite to said given polarity, said second output pulses of said opposite polarity and said steady state first output providing a voltage differential at the crossovers of a selected second line and unselected first lines which is below that necessary for establishing luminescence of said electroluminescent material, said second output pulses of said given polarity and said first output pulses producing a voltage differential at the Crossovers of a selected first line and unselected second lines which is below that necessary for establishing luminescence of vsaid electroluminescent material said first output pulse and said second output pu-lse opposite polarity producing a voltage differential at the crossover of a selected first line and a selected second line necessary for establishing luminescence of said material, said first output pulse and said second output pulse opposite polarity producing a voltage differential at the crossover of a selected first line and a lselected second line necessary for establishing luminescence of said material.

7. A two-dimensional display system comprising an electroluminescent panel including an array of first spaced lines extending in a first direction and an array of second spaced lines extending in a second direction, each of said first lines lines crossing said second lines to form a plurality of crossover points, and a layer of electroluminescent material disposed between said arrays of lines, means for generating excitation pulses in a first time slot, means for generating suppression pulses in a second time slot adjacent to said first time slot suppression pulses occupying different first and second time slots, a plurality of first drivers each coupled to a corresponding one of said first lines, a plurality of second drivers each coupled to a corresponding one of said second lines, said drivers each including a transistor normally isolated from said suppression pulses and in a cut-off condition, so that a steady state first output is derived, first circuit means for selectively applying a first gating pulse to a selected one of said first drivers corresponding to the first line to be selected, second circuit means for selectively applying a second gating pulse to a selected one of said second drivers corresponding to the second line to be selected, the transistor of said first line driver being rendered conductive by said first gating pulse for transferring said suppression pulses to said transistor for producing a first output pulse at said second time slot during conduction of said transistor, the transistors of said 15 second line drivers normally being isolated from said eX- citation pulses and rendered conductive in response to said suppression pulses` to produce second output pulses at said second time slot, the transistor of said selected second line driver being rendered conductive in response to said excitation pulses during the period of said second gating pulse to produce second output pulses at said first time slot, said second output pulses at said second time slot and said steady state first output providing `a voltage differential at the Crossovers of a selected second -line and unselected first lines which is below that necessary for establishing luminescence of said electroluminescent material, said second Voutput pulses at said first time slot and f said first output pulses at said second time slot producing a voltage differentialat the Crossovers of a selected first line and unselected second lines which is below that necessary for establishing luminescence of said electroluminescent material said first output pulses and said second out- References Cited UNITED STATES PATENTS 2,995,682 8/1961 Livingston 340-166 3,043,961 7/1962 Kazan 250-2l3 3,157,822 11/1964 Haskell 315--169 OTHER REFERENCES Greenberg, Electroluminescent Display and Logic Devices, March `24, 1961, Electronics, pp. 31-35.

NEIL C. READ, Prima/y Examiner.

A. I. KASPER, Assistant Examiner. 

1. A TWO-DIMENSIONAL DISPLAY SYSTEM COMPRISING AN ELECTROLUMINESCENT PANEL INCLUDING AN ARRAY OF FIRST SPACED LINES EXTENDING IN A FIRST DIRECTION AND AN ARRAY OF SPACED SECOND LINES EXTENDING IN A SECOND DIRECTION, EACH OF SAID FIRST LINES CROSSING SAID SECOND LINES TO FORM A PLURALITY OF CROSSOVER POINTS, AND A LAYER OF ELECTROLUMINESCENT MATERIAL DISPOSED BETWEEN SAID ARRAYS OF LINES, A PLURALITY OF FIRST DRIVERS EACH COUPLED TO A CORRESPONDING ONE OF SAID FIRST LINES, A PLURALITY OF SECOND DRIVERS EACH COUPLED TO A CORRESPONDING ONE OF SAID SECOND LINES, FIRST CIRCUIT MEANS FOR SELECTIVELY APPLYING A FIRST GATING PULSE TO A SELECTED ONE OF SAID FIRST DRIVERS CORRESPONDING TO THE FIRST LINE TO BE SELECTED, SECOND CIRCUIT MEANS FOR SELECTIVELY APPLYING A SECOND GATING PULSE TO A SELECTED ONE OF SAID SECOND DRIVERS CORRESPONDING TO THE SECOND LINE TO BE SELECTED, EACH OF SAID FIRST DRIVERS BEING NORMALLY PRODUCTIVE OF A FIRST VOLTAGE OUTPUT ON SAID CORRESPONDING ONE OF SAID FIRST LINES, EACH OF SAID FIRST LINE DRIVERS BEING RESPONSIVE TO SAID FIRST GATING PULSE FOR PRODUCING A SECOND VOLTAGE OUTPUT ON SAID CORRESPONDING ONE OF SAID FIRST LINES, EACH OF SAID SECOND LINE DRIVERS BEING NORMALLY PRODUCTIVE OF A THIRD VOLTAGE OUTPUT ON SAID CORRESPONDING ONE OF SAID SECOND LINES, EACH OF SAID SECOND LINE DRIVERS RESPONSIVE TO SAID SECOND GATING PULSE TO PRODUCE A FOURTH VOLTAGE OUTPUT ON SAID CORRESPONDING ONE OF SAID SECOND LINES, SAID FOURTH VOLTAGE OUTPUT AND SAID FIRST VOLTAGE OUTPUT AT THE CROSSOVERS OF A SELECTED SECOND LINE AND UNSELECTED FIRST LINES PRODUCE A VOLTAGE DIFFERENTIAL WHICH IS BELOW THAT NECESSSARY FOR ESTABLISHING LUMINESCENCE OF SAID ELECTROLUMINESCENT MATERIAL, SAID SECOND VOLTAGE OUTPUT AND SAID THIRD VOLTAGE OUTPUT AT THE CROSSOVERS OF A SELECTED FIRST LINE AND UNSELECTED SECOND LINES PRODUCE A VOLTAGE DIFFERENTIAL WHICH IS BELOW THAT NECESSARY FOR ESTABLISHING LUMINESCENCE OF SAID ELECTROLUMINESCENT MATERIAL WHILE SAID SECOND VOLTAGE OUTPUT AND SAID FOURTH VOLTAGE OUTPUT AT THE CROSSOVER OF THE SELECTED FIRST LINE AND THE SELECTED SECOND LINE PRODUCE A VOLTAGE DIFFERENTIAL NECESSARY FOR ESTABLISHING LUMINESCENCE OF SAID MATERIAL THEREAT. 